

30 GPIO pins, 4 of which can be used as analog inputs.

2 on-chip PLLs to generate USB and core clocks.On-chip programmable LDO to generate core voltage.Support for up to 16MB of off-chip Flash memory via dedicated QSPI bus.


30 GPIO pins, 4 of which can be used as analog inputs.
2 on-chip PLLs to generate USB and core clocks.On-chip programmable LDO to generate core voltage.Support for up to 16MB of off-chip Flash memory via dedicated QSPI bus.